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? semiconductor components industries, llc, 2013 october, 2013 ? rev. 4 1 publication order number: NCS2632/d NCS2632 nocap , pop-free, 3 v rms audio line driver with adjustable gain the NCS2632 is a pop ? free stereo line driver. it uses on semiconductor?s patented nocap technology which allows the elimination of the external dc ? blocking capacitors by providing ground ? referenced outputs through the generation of an internal negative supply rail. the device can drive 3 v rms into a 600 load at 5 v power supply. by eliminating the two external heavy coupling capacitors, the nocap approach offers significant space and cost savings compared to similar audio solutions. the NCS2632 has differential inputs and is available with an external adjustable gain ranging from 1 v/v to 10 v/v. the gain is adjusted with external resistors. the device can also be configured as a 2nd order low pass filter to complement dac?s and soc converters. in addition to the nocap architecture, it contains specific circuitry to prevent ?pop & click? noise from occurring during enable / shutdown transitions. the signal-to-noise ratio reaches 105 db, offering high fidelity audio sound. the NCS2632 exhibits a high power supply rejection with a typical value of 90 db. this device also features an under ? voltage protection (uvp) function which can be adjusted using an external resistor bridge. the device is available in a tssop ? 14 package. features ? nocap ? eliminates pop/clicks ? eliminates output dc ? blocking capacitors ? provides flat frequency response 20 hz ? 20 khz ? supply voltage from 2.2 v to 5.5 v ? low noise and thd ? snr = 105 db ? typical v n at 8 vrms, a ? weighted ? thd+n < 0.001% at 1 khz ? output voltage into 600 load ? 2 v rms with 3.3 v supply voltage ? 3 v rms with 5 v supply voltage ? adjustable gain from 1 v/v to 10 v/v ? differential input ? high psrr: 90 db ? external under ? voltage detection function ? enhanced pop & click suppression function ? offset voltage 400 v ? outputs pass 8 kv contact discharge according to iec61000 ? 4 ? 2 under application conditions ? available in a tssop ? 14 package ? these devices are pb ? free, halogen free/bfr free and are rohs compliant applications ? set ? top boxes ? pdp / lcd tv ? blu ? ray ? player, dvd players ? home theater in a box ? laptops, notebook pcs marking diagram http://onsemi.com a = assembly location l = wafer lot y = year w = work week = pb ? free package 1 14 tssop ? 14 case 948g ncs 2632 alyw 1 14 see detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet. ordering information *for additional marking information, refer to application note and8473/d. (*note: microdot may be in either location)
NCS2632 http://onsemi.com 2 charge pump circuitry click/pop suppression circuitry bias circuitry vdd inlp inlm cp cn outl outr vss inrm inrp pgnd agnd en agnd agnd uvp figure 1. NCS2632, simplified block diagram 1 2 3 4 5 6 7 14 13 12 11 10 9 8 inrp inrm outr agnd en vss cn cp vdd pgnd uvp outl inlm inlp figure 2. NCS2632, pinout
NCS2632 http://onsemi.com 3 pin function and description pin name type description 1 inrp input right channel positive input 2 inrm input right channel negative input 3 outr output right channel output 4 agnd ground analog ground. connect to pgnd 5 en input enable pin. active high 6 vss power negative rail output. connected to ground through 1 f low esr ceramic reservoir capacitor. 7 cn ? flying capacitor negative terminal. connected to cp through 1 f low esr ceramic capacitor. 8 cp ? flying capacitor positive terminal. connected to cn through 1 f low esr ceramic capacitor. 9 vdd power power supply input 10 pgnd ground power ground 11 uvp input under ? voltage detection pin. 12 outl output left channel output 13 inlm input left channel negative input 14 inlp input left channel positive input absolute maximum ratings (note 1) parameter symbol value unit supply voltage, vdd to gnd v dd ? 0.3 to 5.5 v input voltage v i v ss ? 0.3 to v dd + 0.3 v minimum load impedance r l >600 logic pin voltage (en) ?0.3 to v dd +0.3 v maximum junction temperature t j(max) ? 40 to 150 c storage temperature range t stg ? 40 to 150 c esd capability (note 2) human body model machine model esd hbm esd mm 2000 200 v latch ? up current (note 3) i lu 100 ma moisture sensitivity level (note 4) msl level 1 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. refer to electrical characteristics and application information for safe operating area. 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec ? q100 ? 002 (jedec standard: jesd22 ? a114) esd machine model tested per aec ? q100 ? 003 (jedec standard: jesd22 ? a115) 3. latch ? up current tested per jedec standard: jesd78 4. moisture sensitivity level tested per ipc/jedec standard: j ? std ? 020a thermal characteristics parameter symbol value unit junction ? to ? ambient thermal resistance, tssop ? 14 (note 5) ja 115 c/w 5. values based on copper area of 645 mm 2 (or 1 in 2 ) of 1 oz copper thickness and fr4 pcb substrate. recommended operating conditions parameter symbol min typ max unit supply voltage with uvp connected to ground v dd 2.2 3.3 5.5 v high ? level input voltage v ih (en) 1.2 v low ? level input voltage v il (en) 0.4 v ambient temperature t a ? 40 85 c
NCS2632 http://onsemi.com 4 electrical characteristics , t a = 25 c (unless otherwise noted) parameter symbol test conditions min typ max unit output offset voltage |v os | v dd = 2.5 v to 5 v, voltage follower ? gain = 1 100 400 v high ? level input current (en) |i ih | v dd = 5 v, v i = v dd 100 na low ? level input current (en) |i il | v dd = 5 v, v i = 0 v 100 na supply current i dd v dd = 2.2 v, no load, en = v dd 7 11 ma v dd = 5.5 v, no load, en = v dd 8 11 ma shutdown mode, v dd = 2.2 v to 5.5 v 60 500 na under ? voltage protection (uvp) threshold v uvp 1.25 v uvp internal hysteresis current source i hys 5 a charge pump frequency f cp 400 khz operating characteristics v dd = 3.3 v, t a = 25 c, r l = 2.5 k , c vss = 1 f, c in = 10 f, r in = 10 k , r fb = 20 k (unless otherwise noted) parameter symbol test conditions min typ max unit output voltage (outputs in phase) v o thd = 1%, v dd = 3.3 v, f = 1 khz 2.05 vrms thd = 1%, v dd = 5 v, f = 1 khz 3.05 thd = 1%, v dd = 5 v, f = 1 khz, r l = 100 k 3.1 total harmonic distortion plus noise thd+n v o = 2 vrms, f = 1 khz 0.001 % v o = 2 vrms, f = 10 khz 0.001 % power supply rejection psrr v dd = 2.5 v to 5 v 90 db crosstalk xtalk v o = 2 vrms, f = 1 khz ? 120 db output current limit i o v dd = 3.3 v 21 ma input resistor range (note 6) r in 1 10 47 k feedback resistor range (note 6) r fb 4.7 20 100 k maximum capacitive load (note 6) c out 220 pf noise output voltage v n a ? weighted 8 vrms signal to noise ratio snr v o = 2 vrms, thd + n = 0.1% a ? weighted filter 105 db 6. guaranteed by design.
NCS2632 http://onsemi.com 5 typical characteristics v dd = 3.3 v, t a = 25 c, r l = 2.5 k , c vss = 1 f, c in = 10 f, r in = 10 k , r fb = 20 k (unless otherwise noted) figure 3. thd+n vs. output voltage over temperature, r l = 2.5 k , v dd = 3.3 v, f = 1 khz figure 4. thd+n vs. output voltage over temperature, r l = 2.5 k , v dd = 5 v, f = 1 khz v out (v) v out (v) 10 1 0.1 0.01 0.0001 0.001 0.01 0.1 1 10 10 1 0.1 0.01 0.0001 0.001 0.01 0.1 1 10 figure 5. thd+n vs. output voltage over supply, r l = 2.5 k , f = 1 khz figure 6. thd+n vs. output voltage over supply, r l = 600 , f = 1 khz v out (v) v out (v) 10 1 0.1 0.01 0.0001 0.001 0.01 0.1 1 10 10 1 0.1 0.01 0.0001 0.001 0.01 0.1 1 10 figure 7. thd+n vs. frequency, r l = 2.5 k figure 8. thd+n vs. frequency, r l = 600 frequency (hz) frequency (hz) 20,000 2000 200 20 0.0001 0.001 0.01 0.1 20,000 2000 200 20 0.0001 0.001 0.01 0.1 thd+n (%) thd+n (%) thd+n (%) thd+n (%) thd+n (%) thd+n (%) ? 40 c 25 c 85 c 125 c ? 40 c 25 c 85 c 125 c v dd = 2.0 v v dd = 3.0 v v dd = 3.3 v v dd = 4.0 v v dd = 4.2 v v dd = 5.0 v v dd = 5.5 v v dd = 2.2 v v dd = 3.0 v v dd = 3.3 v v dd = 3.6 v v dd = 4.2 v v dd = 5.0 v v dd = 5.5 v v dd = 5 v, v out = 3 v v dd = 3.3 v, v out = 2 v v dd = 2.2 v, v out = 1.4 v v dd = 3.3 v, v out = 2.2 v v dd = 5 v, v out = 3.3 v
NCS2632 http://onsemi.com 6 typical characteristics v dd = 3.3 v, t a = 25 c, r l = 2.5 k , c vss = 1 f, c in = 10 f, r in = 10 k , r fb = 20 k (unless otherwise noted) figure 9. gain vs. frequency, r l = 2.5 k figure 10. gain vs. frequency, r l = 600 frequency (hz) frequency (hz) 20,000 2000 200 20 5.90 5.92 5.94 5.96 5.98 6.00 20,000 2000 200 20 5.90 5.92 5.94 5.96 5.98 6.00 figure 11. crosstalk vs. frequency, r l = 2.5 k , v dd = 3.3 v, v o = 2 vrms figure 12. crosstalk vs. frequency, r l = 2.5 k , v dd = 5 v, v o = 2 vrms frequency (hz) frequency (hz) 20,000 2000 200 20 ? 140 ? 120 ? 80 ? 60 ? 40 0 20,000 2000 200 20 ? 140 ? 120 ? 80 ? 60 ? 40 0 figure 13. signal ? to ? noise ratio vs. frequency, r l = 2.5 k figure 14. power supply rejection ratio vs. frequency, r l = 2.5 k frequency (hz) frequency (hz) 20,000 2000 200 20 0 20 80 120 20,000 2000 200 20 ? 120 ? 80 ? 40 0 gain (db) gain (db) crosstalk (db) crosstalk (db) snr (db) psrr (db) v dd = 2.2 v, v out = 1.4 v v dd = 3.3 v, v out = 2 v v dd = 5 v, v out = 3 v v dd = 3.3 v, v out = 2 v v dd = 5 v, v out = 3 v ? 100 ? 20 ? 100 ? 20 40 60 100 v dd = 5 v, v out = 3 vrms v dd = 3.3 v, v out = 2 vrms ? 100 ? 60 ? 20 v dd = 2.2 v v dd = 3.3 v v dd = 5 v
NCS2632 http://onsemi.com 7 typical characteristics v dd = 3.3 v, t a = 25 c, r l = 2.5 k , c vss = 1 f, c in = 10 f, r in = 10 k , r fb = 20 k (unless otherwise noted) figure 15. quiescent current vs. temperature, no load, v i = 0 v, en = high figure 16. v ss vs. temperature temperature ( c) temperature ( c) 85 25 ? 40 6.0 6.5 7.0 7.5 8.0 8.5 125 50 0 ? 50 0 1 2 4 5 6 figure 17. startup turn ? on time, r l = 2.5 k , v dd = 5 v figure 18. shutdown turn ? off time, r l = 2.5 k , v dd = 5 v figure 19. startup turn ? on time, r l = 2.5 k , v dd = 3.3 v figure 20. shutdown turn ? off time, r l = 2.5 k , v dd = 3.3 v supply current (ma) ? v ss ? (v) v dd = 2.2 v v dd = 3.0 v v dd = 5.0 v v dd = 5.5 v ? 25 25 75 100 3 v dd = 3.3 v v dd = 5 v en out vss t on 650 s en out vss t on 550 s en out vss t off 80 s en out vss t off 100 s
NCS2632 http://onsemi.com 8 application information description the NCS2632 is a stereo line driver with a nocap architecture. this architecture eliminates the need to use two large, external capacitors required by conventional audio line driver applications. the NCS2632 is basically composed of two true ground amplifiers with internal power supply rail, one uvp ? circuit block, and short ? circuit protection. the gain of the NCS2632 can be adjusted with two external resistors. the nocap approach is a patented architecture that requires only two 1 f low esr ceramic capacitors (fly capacitor and reservoir capacitor). it generates a symmetrical positive and negative voltage and it allows the output of the amplifiers to be biased around the ground (true ground). the NCS2632 includes a special circuitry for eliminating any pop and click noise during turn on and turn off time. this circuitry combined with the true ground output architecture and a trimmed output offset voltage makes the elimination of pop and click particularly efficient. under ? voltage protection (uvp) pin management t he uvp pin can be used to shut down the audio line driver by monitoring the board?s main power supply. then the line driver can be shut down before upstream devices disable, contributing this way to eliminate potential source of pop noise. the device shuts down when the uvp voltage goes below 1.25 v typically. to monitor the lower main power supply limit, an external voltage divider constituted with three resistors, rup, rdw and rhys is used (figure 21). resistors values have to be chosen based on the requested power supply shutdown threshold and hysteresis for a given application. it is recommended to have rhys >> rdw // rup. rhys is optional in the case where hysteresis is not necessary. uvp board main power suppply rup rdw pvdd rhys vn i hys on/off figure 21. voltage divider connected to uvp for power supply monitoring
NCS2632 http://onsemi.com 9 when the resistor divider is connected to the pin uvp as shown in figure 21, the uvp pin voltage is a function of pvdd and i hys according to the below equation: v uvp pvdd rdw rdw rup rhys rdw rup rdw rup i hys (eq. 1) with v uvpth = 1.25 v and i hys = 5 a this gives a pvdd shutdown threshold. pvdd shutdown threshold : pvdd sd v uvpth rdw rup rdw i hys rhys rdw rup rdw rup rdw rup rdw (eq. 2) simplified pvdd shutdown threshold assuming rhys >> rdw // rup: pvdd sd v uvpth i hys rhys rdw rup rdw (eq. 3) the pvdd startup threshold is given by the below equation. pvdd hysteresis : pvdd up v uvpth rdw rup rdw (eq. 4) the hysteresis component is: pvdd hysteresis : pvdd v hys i hys rhys rdw rup rdw rup rdw rup rdw (eq. 5) i hys rhys rdw rup rdw rup pvdd up v uvpth simplified pvdd hysteresis assuming rys >> rdw // rup : pvdd v hys i hys rhys rdw rup rdw i hys rys pvdd up v uvpth (eq. 6) for a given pvdd threshold rup will be a function of rdw. rup and rdw : rup pvdd up v uvpth 1 rdw (eq. 7) according to equation 6, assuming rhys >> rdw // rup, and for a given hysteresis v hys and pvdd threshold, rhys is: rhys rhys v hys v uvpth i hys pvdd up 1.25 v hys 5 a pvdd up (eq. 8) for example, to get pvdd sd = 2.5 v and 0.625 v hysteresis, power divider resistors have to be: rup = 1.5 k , rdw = 1 k and rhys = 51 k
NCS2632 http://onsemi.com 10 gain setting resistor selection (r in and r fb ) r in and r fb set the closed ? loop gain of the amplifier. the resistor values have to be chosen so that amplifier stability is preserved. a low gain configuration (close to 1) minimizes the thd + noise values and maximizes the signal to noise ratio. a closed ? loop gain in the range of 1 to 10 is recommended to optimize overall system performance. selecting values that are too low requires a relatively large input ac-coupling capacitor, c in . selecting values that are too high increases the overall noise of the amplifier. c in c in r in r in r fb r fb vout vin+ vin ? av vout vin+ vin ? r fb r in (eq. 9) figure 22. differential input gain configuration c in r in r fb vin ? vout av vout vin ? ? r fb r in (eq. 10) figure 23. inverting gain configuration c in c in r in r x vout vin+ r fb av v out vin+ 1 r fb r in (eq. 11) figure 24. non ? inverting gain configuration
NCS2632 http://onsemi.com 11 table 1. recommended resistor values input resistor val- ue, r in feedback resistor val- ue, r fb differential input gain inverting input gain non inverting input gain 22 k 22 k 1.0 v/v ?1.0 v/v 2.0 v/v 22 k 33 k 1.5 v/v ?1.5 v/v 2.5 v/v 33 k 68 k 2.06 v/v ?2.06 v/v 3.1 v/v 10 k 100 k 10.0 v/v ?10.0 v/v 11.0 v/v input capacitor the input coupling capacitor blocks the dc voltage at the amplifier input terminal. this capacitor creates a high ? pass filter with r in . the size of the capacitor must be large enough to couple at low frequencies without severe attenuation in the audio bandwidth (20 hz ? 20 khz). the cut off frequency for the input high ? pass filter is: f c 1 2 r in c in (eq. 12) a f c < 20 hz is recommended. charge pump capacitor selection it is recommended to use ceramic capacitors with low esr for better performances. x5r or x7r capacitors are recommended. the flying capacitor c fly (1 f) serves to transfer charge during the generation of the negative voltage. the vss reservoir capacitor c vss must be equal at least to the c fly capacitor to allow maximum charge transfer. the 1 f capacitors have to be connected as close as possible to the corresponding pins. lower value capacitors can be used but the device may not operate to specifications. power supply decoupling capacitors the NCS2632 is a true ground amplifier that requires an adequate decoupling capac itor on vdd to reduce noise and thd+n. use a x5r / x7r ceramic capacitor and place it close to the vdd pin. a value of 1 f is recommended. for filtering lower frequency noise signals, a 10 f or greater capacitor placed near the audio power amplifier would also help. shutdown function the device enters shutdown mode when enable signal is low. during the shutdown mode, the internal charge pump is shut down, and the dc quiescent current of the circuit does not exceed 500 na. the output is pulled to ground through a low output impedance of about 40 ohms. using the NCS2632 as a 2 nd order filter audio dacs can require an external low-pass filter to remove out-of-band noise. this is possible with the NCS2632, which can be used as a standard operational amplifier with the advantage of better performances including ?pop & click? noise behavior. single-ended and differential topologies can be implemented. in figures 25 and 26, a multiple-feedback (mfb) topoplogy , with dif ferential inputs and single-ended inputs is shown. the two topologies use ac-coupling capacitors (c in ) to block the dc-signal component coming from the source; they contribute to reducing the output of fset voltage. r in r in c in c in vin ? vin+ c diff c int r fb r fb c int r int r int vout figure 25. 2nd order active low pass filter ? differential input
NCS2632 http://onsemi.com 12 r in c in vin ? c t c int r fb r int vout figure 26. 2nd order active low pass filter ? inverting input initialization and pop ? free power up/down for an on/off/on power sequence, vdd is required to be ramped down to 0 v before ramping back up for power on (shown in figure 27). this ensures that the NCS2632 internal circuits are properly initialized to guarantee an optimal output. pop ? free power ? up/ ? down is ensured by keeping en (enable pin) low during power supply ramp ? up or ramp ? down. the en pin should be kept low until the input ac ? coupling capacitors are fully charged before asserting the en pin high; this way, proper pre ? charge of the ac ? coupling is performed, and pop ? free power ? up is achieved. figure 27 illustrates the preferred sequence. figure 27. initialization and power up/down sequence vdd ramp ? up vss (negative rail) 0v 0v +vdd ? vdd internal vss supply vdd supply en vdd ramp ? down vss t charge t discharge ac ? coupled input capacitor pre ? charge time capacitor discharge capacitive load the NCS2632 has the ability to drive a high capacitive load up to 220 pf directly. higher capacitive loads can be accepted by adding a series resistor of 10 or larger. esd performance from the system level perspective, the outputs of the NCS2632 are rated to level 4 of the iec61000 ? 4 ? 2 esd standard. using the contact discharge method, the outputs pass a 8 kv discharge with an rc network of r = 33 ohms and c = 1 nf at each output to simulate the application environment.
NCS2632 http://onsemi.com 13 application schematic charge pump circuitry click/pop suppression circuitry bias circuitry inlp inlm cp cn outl outr inrm inrp pgnd agnd en agnd agnd uvp regulated 3.3v/5.0 v vdd vss board main power suppply enable right input ? + left input 1 f + ? c1 c1 r1 r1 r2 r2 c2 c3 r3 r3 c3 r1 r1 c1 c1 c3 r3 r2 r2 c2 rup rdw r3 c3 1 f 1 f left output right output r1 = r2 = r3 = 5.6 k , c1 = 100 nf, c2 = 470 pf, c3 = 220 pf figure 28. application schematic ordering information device package shipping ? NCS2632dtbr2g tssop ? 14 (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
NCS2632 http://onsemi.com 14 package dimensions tssop ? 14 case 948g issue b dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.50 0.60 0.020 0.024 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash, protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ? w ? . s u 0.15 (0.006) t 2x l/2 s u m 0.10 (0.004) v s t l ? u ? seating plane 0.10 (0.004) ? t ? ??? ??? ??? section n ? n detail e j j1 k k1 ? w ? 0.25 (0.010) 8 14 7 1 pin 1 ident. h g a d c b s u 0.15 (0.006) t ? v ? 14x ref k n n 7.06 14x 0.36 14x 1.26 0.65 dimensions: millimeters 1 pitch *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint*
NCS2632 http://onsemi.com 15 on semiconductor and are registered trademarks of semiconductor co mponents industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other inte llectual property. a listing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/ or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typical s? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or a uthorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in whic h the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or us e scillc products for any such unintended or unauthorized appli cation, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unin tended or unauthorized use, even if such claim alleges that scil lc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyrig ht laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 NCS2632/d nocap is a trademark of semiconductor components industries, llc (scillc). blu ? ray and blu ? ray disc are trademarks of blu ? ray disc association. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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